AES : Advanced Encryption Standard
Objective : Implementation
of AES from Specs to Physical design in 180nm technology
EDA Tools : Cadence RC, NCSIM, Encounter
The Advanced
Encryption Standard (AES)
is a specification for the encryption of electronic data established by National Institute of Standards and Technology (NIST) in 2001. We implemented AES128 encryption
algorithm which encrypts the 128 bit data (plain text) using 128 bit cipher key
to produce 128 bit encrypted output (cipher text). The design approach used for
the implementation of the project is as follows: Writing RTL (Verilog) description
for the algorithm, Verification of RTL by simulation, Synthesizing to target
library, Floor planning, Placing and routing the design and Verification

Specifications
Frequency : 1GHz
Gate Count : 22K
Power : 55mW



