SRAM

Objective :
Design and implementation of a 1KB SRAM array operating at 50 MHz using 180nm technology

EDA Tools : Cadence Virtuoso Layout Editor, spectre, Assura DRC and LVS

CMOS memories are used in a much greater quantity than all the other types of semiconductor integrated circuits. Roughly 30% of the worldwide semiconductor business is due to memory chips. Large SRAM arrays that are widely used as cache memory in microprocessors and ASICs help to boost the system performance. The memory chip market consists of DRAM, SRAM, ROM, EPROM, EEPROM and flash memory. They account for about 90% of the memory chip market.



Specifications

Power Supply : 1.8 V

Frequency of operation : 50 MHz

Technology : 180nm